A Low-Noise 40-GS/s Continuous-Time Bandpass ∆Σ ADC Centered at 2GHz
نویسندگان
چکیده
A 2-GHz, Continuous-Time Bandpass ∆Σ Analogto-Digital Converter sampled with a 40-GHz clock was implemented in a 130-nm SiGe BiCMOS technology. It achieves an SNDR of 55 dB and 52 dB over 60 MHz and 120 MHz, respectively, and an SFDR of 61 dB with a single-ended IIP3 of +4 dBm. The center frequency is tunable from 1.8-2 GHz. It employs a Gm-LCVAR filter based on a MOS-HBT cascode transconductor with an NFMIN of 2.3 dB. The ADC dissipates 1.6 W from a 2.5-V supply with a figure of merit of 18 pJ/sampled bit, including the contribution of the 40-GHz clock distribution network.
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